kw.\*:("Función lógica")
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Multi-polarity helix transform over GF(3)CHENG FU; FALKOWSFI, Bogdan J.IEEE International Symposium on Circuits and Systems. 2004, pp 289-292, isbn 0-7803-8251-X, 4 p.Conference Paper
Extensional models for polymorphismBREAZU-TANNEN, V; COQUAND, T.Theoretical computer science. 1988, Vol 59, Num 1-2, pp 85-114, issn 0304-3975Conference Paper
Réalisation d'ensemble de fonctions logiques à l'aide de polynômes arithmétiquesMALYUGIN, V. D.Computers and artificial intelligence. 1987, Vol 6, Num 6, pp 541-552, issn 0232-0274Article
Quaternary boolean algebra and function compositionNAKAO, Z.Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. 1985, Vol 68, Num 11, pp 745-746, issn 0387-236XArticle
Optimization of Reed-Muller logic functionsMCKENZIE, L; ALMAINI, A. E. A; MILLER, J. F et al.International journal of electronics. 1993, Vol 75, Num 3, pp 451-466, issn 0020-7217Article
The HM53462: 64 kbit×4 dual-port video RAM with logic functionsSATO, K; ISHIHARA, M; TANIMURA, N et al.Hitachi review. 1986, Vol 35, Num 5, pp 259-262, issn 0018-277XArticle
Upgrading to a Soft Multifunctional Image Processor for Implementation on a Field Programmable Gate Array with Additional Biasing and Logical CapabilitiesTICKLE, Andrew J; HARVEY, Paul K; AHMED, Moin et al.Proceedings of SPIE, the International Society for Optical Engineering. 2008, Vol 7100, pp 71002H.1-71002H.12, issn 0277-786X, isbn 978-0-8194-7330-1 0-8194-7330-8, 2Vol, 2Conference Paper
New perceptronADAMS, A; BYE, S. J.Electronics Letters. 1992, Vol 28, Num 3, pp 321-322, issn 0013-5194Article
On expanding boolean algebra into a new dual-biform logic algebraALESSO, H. P.Reliability engineering & systems safety. 1990, Vol 28, Num 2, pp 255-263, issn 0951-8320Article
Revue des problèmes équivalents de réalisation des circuits à base de ET-NON ne dépendant pas de la vitesseTSIRLIN, B. S.Izvestiâ Akademii nauk SSSR. Tehničeskaâ kibernetika. 1966, Num 2, pp 159-171, issn 0002-3388Article
The logic-temporary function derivative using in image recognitionKOZHEMIAKO, V; PONURAYA, E; SACHANIUK, N et al.SPIE proceedings series. 2000, pp 50-54, isbn 0-8194-3795-6Conference Paper
Multi-level implementation of delay - insensitive logicLEMBERSKI, Igor; KIM, Kiseon.Analog and digital techniques in electrical engineering. Conference. 2004, isbn 0-7803-8560-8, Vol2, 187-190Conference Paper
Using decision trees for the minimization of multiple-valued functionsLLORIS, A; GOMEZ, J. F; ROMAN, R et al.International journal of electronics. 1993, Vol 75, Num 6, pp 1035-1041, issn 0020-7217Article
Algorithm of elimination of attributes and arguments based on unate complement conceptLUBA, T; RYBNIK, J.Bulletin of the Polish Academy of Sciences. Technical sciences. 1992, Vol 40, Num 3, pp 313-322, issn 0239-7528Article
Low-complexity synthesis of incompletely specified multiple-output mod-2 sumsRIEGE, M. W; BESSLICH, P. W.IEE proceedings. Part E. Computers and digital techniques. 1992, Vol 139, Num 4, pp 355-362, issn 0143-7062Article
Algorithmic synthesis of MVL functions for CCD implementationABD-EL-BARR, M. H; VRANESIC, Z. G; ZAKY, S. G et al.IEEE transactions on computers. 1991, Vol 40, Num 8, pp 977-986, issn 0018-9340Article
Inconsistency check of a set of clauses using Petri net reductionsMURATA, T; MATSUYAMA, K.Journal of the Franklin Institute. 1988, Vol 325, Num 1, pp 73-93, issn 0016-0032Article
There are denumerably many ternary intuitionistic Sheffer functionsCUBRIC, D.Notre Dame journal of formal logic. 1988, Vol 29, Num 4, pp 579-581, issn 0029-4527Article
Existence of self-reverse-dual M-sequencesZHE-XIAN WAN; RONG-HUA XIONG.Discrete mathematics. 1987, Vol 66, Num 3, pp 283-288, issn 0012-365XArticle
Estimations des longueurs des tests de détection pour des classes de pannes non constantes des sorties des circuits combinatoiresGLAZUNOV, N. I; GORYASHKO, A. P.Izvestiâ Akademii nauk SSSR. Tehničeskaâ kibernetika. 1986, Num 3, pp 197-200, issn 0002-3388Article
Post-placement rewiring and rebuffering by exhaustive search for functional symmetriesGHANG, Kai-Hui; MARKOV, Igor L; BERTACCO, Valeria et al.IEEE/ACM International Conference on Computer-Aided Design. 2005, pp 56-63, isbn 0-7803-9254-X, 1Vol, 8 p.Conference Paper
Concurrency theoryMONTANARI, Ugo; SASSONE, Vladimiro.Theoretical computer science. 1998, Vol 195, Num 2, issn 0304-3975, 216 p.Conference Proceedings
Classification of Pk2MIYAKAWA, M; STOJMENOVIC, I.Discrete applied mathematics. 1989, Vol 23, Num 2, pp 179-192, issn 0166-218XArticle
An implementation of multiple-valued logic circuit with CMOS multiple-valued output gatesSAKATA, I.Systems and computers in Japan. 1989, Vol 20, Num 2, pp 67-77, issn 0882-1666Article
Bounding signal probabilities in combinational circuitsMARKOWSKY, G.IEEE transactions on computers. 1987, Vol 36, Num 10, pp 1247-1251, issn 0018-9340Article